Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1612

Sharc+ processor
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ADSP-SC58x USB Register Descriptions
LPM Interrupt Enable Register
The
register enables the link power management (LPM) related interrupts. When an interrupt is
USB_LPM_IEN
enabled in this register and the corresponding interrupt is pending in USB_LPM_IRQ, the USB controller gener-
ates the interrupt. When an interrupt is disabled in this register, the corresponding interrupt may be pending in
USB_LPM_IRQ, but the USB controller does not generate an interrupt.
Figure 27-97: USB_LPM_IEN Register Diagram
Table 27-73: USB_LPM_IEN Register Fields
Bit No.
(Access)
5
LPMERR
(R/W)
4
LPMRES
(R/W)
3
LPMNC
(R/W)
2
LPMACK
(R/W)
1
LPMNY
(R/W)
27–200
7
6
5
0
0
0
LPMERR (R/W)
LPM Error Interrupt Enable
LPMRES (R/W)
LPM Resume Interrupt Enable
LPMNC (R/W)
LPM NYET Control Interrupt Enable
Bit Name
LPM Error Interrupt Enable.
LPM Resume Interrupt Enable.
LPM NYET Control Interrupt Enable.
LPM ACK Interrupt Enable.
LPM NYET Interrupt Enable.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
4
3
2
1
0
0
0
0
0
0
LPMST (R/W)
LPM STALL Interrupt Enable
LPMNY (R/W)
LPM NYET Interrupt Enable
LPMACK (R/W)
LPM ACK Interrupt Enable
Description/Enumeration
0 Disable Interrupt
1 Enable Interrupt
0 Disable Interrupt
1 Enable Interrupt
0 Disable Interrupt
1 Enable Interrupt
0 Disable Interrupt
1 Enable Interrupt
0 Disable Interrupt
1 Enable Interrupt

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