Epi Write Fifo Count (Epiwfifocnt) Register, Offset 0X204; Epi Write Fifo Count (Epiwfifocnt) Register [Offset 0X204]; Epi Write Fifo Count (Epiwfifocnt) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Register Descriptions

17.11.19 EPI Write FIFO Count (EPIWFIFOCNT) Register, offset 0x204

This register contains the number of slots currently available in the WFIFO. This register may be used for
polled writes to avoid stalling and for blocking reads to avoid excess stalling (due to undrained writes). An
example use for writes may be:
for (idx = 0; idx < cnt; idx++) {
while (EPIWFIFOCNT== 0) ;
*ext_ram = *mydata++;
}
The above code ensures that writes to the address mapped location do not occur unless the WFIFO has
room. Although polling makes the code wait (spinning in the loop), it does not prevent interrupts being
serviced due to bus stalling.
Figure 17-46. EPI Write FIFO Count (EPIWFIFOCNT) Register [offset 0x204]
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 17-32. EPI Write FIFO Count (EPIWFIFOCNT) Register Field Descriptions
Bit Field
31-3 Reserved
2-0 WTAV
1294
External Peripheral Interface (EPI)
Reserved
R-0x0000.000
Value Description
Reserved
Available Write Transactions
The number of write transactions available in the WFIFO. When clear, a write is stalled waiting for a
slot to become free (from a preceding write completing).
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SPRUHE8E – October 2012 – Revised November 2019
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3 2 0
WTAV
R-0x4