Operation As A Device - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Functional Description
In addition, the USB controller provides support for connecting to non-OTG peripherals or Host controllers.
The USB controller can be configured to act as either a dedicated Host or Device, in which case, the
USB0VBUS and USB0ID signals can be used as GPIOs. However, when the USB controller is acting as a
self-powered Device, a GPIO input must be connected to VBUS and configured to generate an interrupt
when the VBUS level drops. This interrupt is used to disable the pullup resistor on the USB0DP signal.
Note: When USB is used in the system, the minimum system frequency is 20 MHz.

18.2.1 Operation as a Device

This section describes the USB controller's actions when it is being used as a USB Device. Before the
USB controller's operating mode is changed from device to host or host to device, software must reset the
USB controller by setting the USB0 bit in the software reset control 2 (SRCR2) register (see the System
Control chapter). IN endpoints, OUT endpoints, entry into and exit from SUSPEND mode, and recognition
of start of frame (SOF) are all described.
When in device mode, IN transactions are controlled by an endpoint's transmit interface and use the
transmit endpoint registers for the given endpoint. OUT transactions are handled with an endpoint's
receive interface and use the receive endpoint registers for the given endpoint. When configuring the size
of the FIFOs for endpoints, take into account the maximum packet size for an endpoint.
• Bulk. Bulk endpoints should be the size of the maximum packet (up to 64 bytes) or twice the maximum
packet size if double buffering is used (described further in the following section).
• Interrupt. Interrupt endpoints should be the size of the maximum packet (up to 64 bytes) or twice the
maximum packet size if double buffering is used.
• Isochronous. Isochronous endpoints are more flexible and can be up to 1023 bytes.
• Control. It is also possible to specify a separate control endpoint for a USB device. However, in most
cases the USB device should use the dedicated control endpoint on the USB controller's endpoint 0.
18.2.1.1 Endpoints
When operating as a Device, the USB controller provides two dedicated control endpoints (IN and OUT)
and 30 configurable endpoints (15 IN and 15 OUT) that can be used for communications with a Host
controller. The endpoint number and direction associated with an endpoint is directly related to its register
designation. For example, when the Host is transmitting to endpoint 1, all configuration and data is in the
endpoint 1 transmit register interface.
Endpoint 0 is a dedicated control endpoint used for all control transactions to endpoint 0 during
enumeration or when any other control requests are made to endpoint 0. Endpoint 0 uses the first 64
bytes of the USB controller's FIFO RAM as a shared memory for both IN and OUT transactions.
The remaining 30 endpoints can be configured as control, bulk, interrupt, or isochronous endpoints. They
should be treated as 15 configurable IN and 15 configurable OUT endpoints. The endpoint pairs are not
required to have the same type for their IN and OUT endpoint configuration. For example, the OUT portion
of an endpoint pair could be a bulk endpoint, while the IN portion of that endpoint pair could be an
interrupt endpoint. The address and size of the FIFOs attached to each endpoint can be modified to fit the
application's needs.
18.2.1.1.1 IN Transactions as a Device
When operating as a USB device, data for IN transactions is handled through the FIFOs attached to the
transmit endpoints. The sizes of the FIFOs for the 15 configurable IN endpoints are determined by the
USB Transmit FIFO Start Address (USBTXFIFOADD) register. The maximum size of a data packet that
may be placed in a transmit endpoint's FIFO for transmission is programmable and is determined by the
value written to the USB Maximum Transmit Data Endpoint n (USBTXMAXPn) register for that endpoint.
The endpoint's FIFO can also be configured to use double-packet or single-packet buffering. When
double-packet buffering is enabled, two data packets can be buffered in the FIFO, which also requires that
the FIFO is at least two packets in size. When double-packet buffering is disabled, only one packet can be
buffered, even if the packet size is less than half the FIFO size.
Note: The maximum packet size set for any endpoint must not exceed the FIFO size. The USBTXMAXPn
register should not be written to while data is in the FIFO, as unexpected results may occur.
1318
M3 Universal Serial Bus (USB) Controller
Copyright © 2012–2019, Texas Instruments Incorporated
SPRUHE8E – October 2012 – Revised November 2019
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