Epi Read Fifo Count (Epirfifocnt) Register, Offset 0X06C; Epi Read Fifo Count (Epirfifocnt) Register [Offset 0X06C]; Epi Read Fifo Count (Epirfifocnt) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Table 17-28. EPI Status (EPISTAT) Register Field Descriptions (continued)
Bit Field
4 NBRBUSY
3-1 Reserved
0 ACTIVE

17.11.16 EPI Read FIFO Count (EPIRFIFOCNT) Register, offset 0x06C

This register returns the number of values in the NBRFIFO (the data in the NBRFIFO can be read via the
EPIREADFIFO register). A race is possible, but that only means that more values may come in after this
register has been read.
Figure 17-43. EPI Read FIFO Count (EPIRFIFOCNT) Register [offset 0x06C]
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 17-29. EPI Read FIFO Count (EPIRFIFOCNT) Register Field Descriptions
Bit Field
31-4 Reserved
3-0 COUNT
SPRUHE8E – October 2012 – Revised November 2019
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Value Description
Non-Blocking Read Busy
0 The external interface is not performing a non-blocking read.
1 The external interface is performing a non-blocking read, or if the non-blocking read is paused due
to a write.
Reserved
Register Active .
0 If NBRBUSY is set, the EPIRPSTD0 register is active.
If the NBRBUSY bit is clear, then neither EPIRPSTDx register is active.
1 The EPIRPSTD1 register is active
Reserved
R-0x0000.000
Value Description
Reserved
FIFO Count
Number of filled entries in the NBRFIFO.
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Register Descriptions
4 3
COUNT
External Peripheral Interface (EPI)
0
R
1291