Flash Memory Control Register 2 (Flmcr2) - Renesas H8S/2319 series Hardware Manual

17.5.2

Flash Memory Control Register 2 (FLMCR2)

Bit : 7
FLER
Initial value : 0
R/W : R
FLMCR2 is an 8-bit register that controls the flash memory operating modes. FLMCR2 is
initialized to H'00 by a reset, and in hardware standby mode and software standby mode.
When on-chip flash memory is disabled, a read will return H'00 and writes are invalid.
Bit 7—Flash Memory Error (FLER): Indicates that an error has occurred during an operation on
flash memory (programming or erasing). When FLER is set to 1, flash memory goes to the error-
protection state.
Bit 7
FLER Description
0 Flash memory is operating normally
Flash memory program/erase protection (error protection) is disabled
[Clearing condition]
Reset or hardware standby mode
1 An error has occurred during flash memory programming/erasing
Flash memory program/erase protection (error protection) is enabled
[Setting condition]
See section 17.8.3, Error Protection
Bits 6 to 0—Reserved: These bits cannot be modified and are always read as 0.
Rev. 5.00, 12/03, page 570 of 1088
6 5
— — —
0 0
— — —
4 3 2
— —
0 0 0
— —
1 0
— —
0 0
— —
(Initial value)