Pie Vector Table Mapping; Pie Vector Table - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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The interrupt grouping for peripherals and external interrupts connected to the PIE module is shown in
Table 1-12. Each row in the table shows the eight interrupts multiplexed into a particular CPU interrupt.
INTx.8
INT1 C28.LPMWAKE
(C28LPM)
0x0D4E
INT2 EPWM8_TZINT
(ePWM8)
0x0D5E
INT3 EPWM8_INT
(ePWM8)
0x0D6E
INT4 EPWM9_TZINT
(ePWM9)
0x0D7E
INT5 EPWM9_INT
(ePWM9)
0x0D8E
INT6 EPWM11_TZINT
ePWM11
0x0D9E
INT7 EPWM11_INT
ePWM11
0x0DAE
INT8 Reserved
----
0x0DBE
INT9 Reserved
----
0x0DCE
INT10 ADCINT8
(ADC)
0x0DDE
INT11 Reserved
----
0x0DEE
INT12 LUF
(C28FPU)
0x0DFE
Name VECTOR ID
Reset
INT1
INT2
INT3
(1)
Reset is always fetched from location 0x003F FFC0 in Boot ROM.
(2)
All the locations within the PIE vector table are EALLOW protected.
SPRUHE8E – October 2012 – Revised November 2019
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Table 1-12. PIE Vector Table Mapping
INTx.7 INTx.6 INTx.5
TINT0 Reserved XINT2
(TIMER 0) ---- ----
0x0D4C 0x0D4A 0x0D48
EPWM7_TZINT EPWM6_TZINT EPWM5_TZINT
(ePWM7) (ePWM6) (ePWM5)
0x0D5C 0x0D5A 0x0D58
EPWM7_INT EPWM6_INT EPWM5_INT
(ePWM7) (ePWM6) (ePWM5)
0x0D6C 0x0D6A 0x0D68
EPWM10_TZINT ECAP6_INT ECAP5_INT
ePWM10 (eCAP6) (eCAP5)
0x0D7C 0x0D7A 0x0D78
EPWM10_INT Reserved Reserved
ePWM10 ---- ----
0x0D8C 0x0D8A 0x0D88
EPWM12_TZINT MXINTA MRINTA
ePWM12 (McBSP-A) (McBSP-A)
0x0D9C 0x0D9A 0x0D98
EPWM12_INT DINTCH6 DINTCH5
ePWM12 (C28 DMA) (C28 DMA)
0x0DAC 0x0DAA 0x0DA8
Reserved Reserved Reserved
---- ---- ----
0x0DBC 0x0DBA 0x0DB8
Reserved Reserved Reserved
---- ---- ----
0x0DCC 0x0DCA 0x0DC8
ADCINT7 ADCINT6 ADCINT5
(ADC) (ADC) (ADC)
0x0DDC 0x0DDA 0x0DD8
Reserved Reserved Reserved
---- ---- ----
0x0DEC 0x0DEA 0x0DE8
LVF EPI C28RAMACCVI
OL
(C28FPU) ---- (Memory)
0x0DFC 0x0DFA 0x0DF8
Table 1-13. PIE Vector Table
(1)
Address
0 0x00000D00
1 0x00000D02
2 0x00000D04
3 0x00000D06
Copyright © 2012–2019, Texas Instruments Incorporated
Exceptions and Interrupts Control
INTx.4 INTx.3
XINT1 Reserved
---- ----
0x0D46 0x0D44
EPWM4_TZINT EPWM3_TZINT
(ePWM4) (ePWM3)
0x0D56 0x0D54
EPWM4_INT EPWM3_INT
(ePWM4) (ePWM3)
0x0D66 0x0D64
ECAP4_INT ECAP3_INT
(eCAP4) (eCAP3)
0x0D76 0x0D74
Reserved EQEP3_INT
---- (eQEP3)
0x0D86 0x0D84
Reserved Reserved
--- ----
0x0D96 0x0D94
DINTCH4 DINTCH3
(C28 DMA) (C28 DMA)
0x0DA6 0x0DA4
Reserved Reserved
----- ----
0x0DB6 0x0DB4
Reserved Reserved
---- ----
0x0DC6 0x0DC4
ADCINT4 ADCINT3
(ADC) (ADC)
0x0DD6 0x0DD4
MTOCIPCINT4 MTOCIPCINT3
(IPC) (IPC)
0x0DE6 0x0DE4
C28RAMSINGE Reserved
RR
(Memory) ----
0x0DF6 0x0DF4
(2)
Size(x16) Description
Reset is always
fetched from
2
location 0x003F
FFC0 in BootROM
Not used. See PIE
2
Group 1
Not used. See PIE
2
Group 2
Not used. See PIE
2
Group 3
INTx.2 INTx.1
ADCINT2 ADCINT1
(ADC) (ADC)
0x0D42 0x0D40
EPWM2_TZINT EPWM1_TZINT
(ePWM2) (ePWM1)
0x0D52 0x0D50
EPWM2_INT EPWM1_INT
(ePWM2) (ePWM1)
0x0D62 0x0D60
ECAP2_INT ECAP1_INT
(eCAP2) (eCAP1)
0x0D72 0x0D70
EQEP2_INT EQEP1_INT
(eQEP2) (eQEP1)
0x0D82 0x0D80
SPITXINTA SPIRXINTA
(SPI-A) (SPI-A)
0x0D92 0x0D90
DINTCH2 DINTCH1
(C28 DMA) (C28 DMA)
0x0DA2 0x0DA0
I2CINT2A I2CINT1A
(I2C-A) (I2C-A)
0x0DB2 0x0DB0
SCITXINTA SCIRXINTA
(SCI-A) (SCI-A)
0x0DC2 0x0DC0
ADCINT2 ADCINT1
(ADC) (ADC)
0x0DD2 0x0DD0
MTOCIPCINT2 MTOCIPCINT1
(IPC) (IPC)
0x0DE2 0x0DE0
C28FLSINGERR XINT3
(Memory) (Ext. Int. 3)
0x0DF2 0x0DF0
PIE Group
CPU Priority Priority
1 (highest) -
5 -
6 -
7 -
111
System Control and Interrupts