Control Subsystem Peripherals Clocking - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Clock Control
I/O
I/O
I/O
GPIO
Mux
Clock
Enables
I/O
Clock
Enables
1.8.4.5
Enabling/Disabling Clocks to the Peripheral Modules
The PCLKCR0/1/2/3 registers enable/disable clocks to the various peripheral modules. There is a 2-
SYSCLKOUT cycle delay from when a write to the PCLKCR0/1/2/3 registers occurs to when the action is
valid. This delay must be taken into account before attempting to access the peripheral configuration
registers. Due to the peripheral-GPIO multiplexing at the pin level, all peripherals cannot be used at the
same time. While it is possible to turn on the clocks to all the peripherals at the same time, such a
configuration may not be useful. If this is done, the current drawn will be more than required. To avoid this,
only enable the clocks required by the application.
134
System Control and Interrupts
Figure 1-13. Control Subsystem Peripherals Clocking
C28CLKIN
CLOCK ENABLES FROM
PCLKCR Registers
ePWM 1 to 9 and HRPWM
eCAP1/../6, eQEP1/2/3
Clock
LSPCLK
Enables
McBSP-A
LSPCLK
SCI-A
SPI-A
I2C-A
Clock Enables
Copyright © 2012–2019, Texas Instruments Incorporated
C28 Core
SYSCLKOUT
C28
System
Control
Registers
Periph
Registers
Periph
Registers
LOSPCP
Periph
Registers
Periph
Registers
Periph
Registers
Periph
Registers
HISPCP
CPU TIMERS
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
C28 DMA
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