Master Subsystem Configuration (Mcnf) Register; Master Subsystem Configuration (Mcnf) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Table 1-47. General Purpose Input/Output Peripheral Present (PPGPIO) Register Field
Bit Field
3 GPIOD
2 GPIOC
1 GPIOB
0 GPIOA

1.13.2.10 Master Subsystem Configuration (MCNF) Register

The Master Subsystem Configuration (MCNF) register is shown and described in the figure and table
below.
31
15
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset; x= indeterminate
Table 1-48. Master Subsystem Configuration (MCNF) Register Field Descriptions
Bit Field
31-9 Reserved
8 µCRC
7-3 Reserved
2-0 FLASH
SPRUHE8E – October 2012 – Revised November 2019
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Descriptions (continued)
Value Description
GPIO Port D is present. When set indicates GPIO Port D is present. Whether GPIOD is present or
not depends on the device configuration in OTP flash.
0 GPIO Port D is not present
1 GPIO Port D is present
GPIO Port C is present. When set indicates GPIO Port C is present. Whether GPIOC is present or
not depends on the device configuration in OTP flash.
0 GPIO Port C is not present
1 GPIO Port C is present
GPIO Port B is present. When set indicates GPIO Port B is present. Whether GPIOB is present or
not depends on the device configuration in OTP flash.
0 GPIO Port B is not present
1 GPIO Port B is present
GPIO Port A is present. When set indicates GPIO Port A is present. Whether GPIOA is present or
not depends on the device configuration in OTP flash.
0 GPIO Port A is not present
1 GPIO Port A is present
Figure 1-37. Master Subsystem Configuration (MCNF) Register
9
Value Description
Reserved
µCRC Configuration
0 µCRC is disabled
1 µCRC is present
Reserved
M3 Flash Size Configuration
111 512KB
110 256KB
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Reserved
R-0
8 7
µCRC Reserved
R-x R-0
System Control Registers
16
3 2
FLASH
R-x
System Control and Interrupts
0
183