Safety Control Registers; Control Subsystem Clock Disable (Cclkoff) Register; M3 Configuration Write Allow (Mwrallow) Register; M3 Configuration Lock (Mlock) Register - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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System Control Registers

1.13.5.21 Control Subsystem Clock Disable (CCLKOFF) Register

Figure 1-87. Control Subsystem Clock Disable (CCLKOFF) Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-98. Control Subsystem Clock Disable (CCLKOFF) Register Field Descriptions
Bit
Field
31-1
Reserved
0
C28CLKINDIS

1.13.6 Safety Control Registers

1.13.6.1 M3 Configuration Write Allow (MWRALLOW) Register

Figure 1-88. M3 Configuration Write Allow (MWRALLOW) Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-99. M3 Configuration Write Allow (MWRALLOW) Register Field Descriptions
Bit
Field
31-0
ALLOW
0xA5A5A5A5 Protected register writes allowed

1.13.6.2 M3 Configuration Lock (MLOCK) Register

31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
222
System Control and Interrupts
Reserved
R-0:0
Value
Description
Reserved
C28 CPU CLKIN Disable
This bit decides if the C28 CPU gets a clock or not.
0
C28 CPU CLKIN is on and is the same frequency as PLLSYSCLK.
1
C28 CPU CLKIN is turned off.
Value
Description
M3 Write Allow Bits
These bits when set to "0xA5A5A5A5" enable the write to all other protected mode register
writes on the M3 subsystem.
This register can be written to only by the M3 in privilege mode.
Any other
Protected register writes disabled
value
Figure 1-89. M3 Configuration Lock (MLOCK) Register
Reserved
R-0
Copyright © 2012–2019, Texas Instruments Incorporated
ALLOW
R/W-0:0
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
1
0
C28CLKINDIS
R/W-0
0
1
0
MSxMSELLOCK
R/W-0
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