Low Power Modes; Timerxtprh Register (X = 0, 1, 2); Timerxtprh Register Field Descriptions; Device Low Power Modes For Active Power Reduction - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bits
Field
15-8
PSCH
7-0
TDDRH
1.9

Low Power Modes

1.9.1 Low-Power Modes
The device can operate in various low-power modes. The entry and exit from low power modes on both
the subsystems is controlled by separate logic, except in the deep sleep mode which is common to the
entire device. All the below summarized low power modes are useful to conserve active power in the
device.
Table 1-24
shows the state of the M3 and C28 subsystems for the low-power modes.
Table 1-24. Device Low Power Modes for Active Power Reduction
PLL
On
(decided by
SYSCLKCTL register)
On
Off
The master subsystem can be put in either sleep or deep-sleep low-power mode.
Allowed control subsystem modes when the master subsystem is in SLEEP mode are:
Active mode
Idle mode
Standby mode
Allowed control subsystem mode when the master subsystem is in DEEPSLEEP mode is:
Standby mode ONLY
It is expected that when the M3 subsystem is in the deep-sleep mode, the C28 subsystem is not in normal
power mode. In other words, the M3 subsystem can enter deep sleep only when the C28 subsystem is in
STANDBY mode. The low-power modes of individual subsystems are described in more detail in the
following sections.
1.9.1.1
Master Subsystem Low-Power Modes Configuration
The master subsystem has the following low-power modes:
Sleep mode
Deep-sleep mode
SPRUHE8E – October 2012 – Revised November 2019
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Figure 1-22. TIMERxTPRH Register (x = 0, 1, 2)
PSCH
R-0
Table 1-23. TIMERxTPRH Register Field Descriptions
Description
See description of TIMERxTPR.
See description of TIMERxTPR.
M3 CPU
Master Subsystem
Sleep mode
Active
(M3 SS CLK full speed)
Deep Sleep mode
Deep sleep mode
Copyright © 2012–2019, Texas Instruments Incorporated
8
7
C28 CPU
Active
(CLKIN, CPUCLK,
SYSCLK on)
Idle
(CLKIN on, CPUCLK off,
SYSCLK on)
Standby
(CLKIN off, CPUCLK off,
SYSCLK off)
Standby
(CLKIN off, CPUCLK off,
SYSCLK off)
Low Power Modes
TDDRH
R/W-0
Control Subsystem
Active
(SYSCLK on)
Active
(SYSCLK on)
Stand by
(SYSCLK off)
Stand by
(SYSCLK off)
System Control and Interrupts
0
141

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