C28 Nmi Watchdog Period (Cnmiwdprd) Register; Pie, Control (Piectrl) Register; Pie, Acknowledge (Pieack) Register; C28 Nmi Watchdog Period (Cnmiwdprd) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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1.13.5.12 C28 NMI Watchdog Period (CNMIWDPRD) Register

15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-83. C28 NMI Watchdog Period (CNMIWDPRD) Register Field Descriptions
Bit Field
15-0 NMIWDPRD
1.13.5.13 PIE Interrupt Registers

1.13.5.13.1 PIE, Control (PIECTRL) Register

15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bits Field
15-1 PIEVECT
0 ENPIE

1.13.5.13.2 PIE, Acknowledge (PIEACK) Register

15 12
Reserved
R-0
LEGEND: R/W1C = Read/Write 1 to clear; R = Read only; -n = value after reset
SPRUHE8E – October 2012 – Revised November 2019
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Figure 1-72. C28 NMI Watchdog Period (CNMIWDPRD) Register
Value Description
NMI Watchdog Period
This 16-bit value contains the period value at which a reset is generated when the watchdog
counter matches. At reset this value is set at the maximum. The software can decrease the period
value at initialization time.
Writing a PERIOD value that is smaller then the current counter value will automatically force an
NMIRS to the C28 and hence reset the watchdog counter.
Figure 1-73. PIE, Control (PIECTRL) Register
PIEVECT
R-0
Table 1-84. PIE, Control (PIECTRL) Register Field Descriptions
Value Description
These bits indicate the address within the PIE vector table from which the vector was fetched. The
least significant bit of the address is ignored and only bits 1 to 15 of the address is shown. You can
read the vector value to determine which interrupt generated the vector fetch.
For Example: If PIECTRL = 0x0D27 then the vector from address 0x0D26 (illegal operation) was
fetched.
Enable vector fetching from PIE vector table.
Note: The reset vector is never fetched from the PIE, even when it is enabled. This vector is always
fetched from boot ROM.
0 If this bit is set to 0, the PIE block is disabled and vectors are fetched from the CPU vector table in
boot ROM. All PIE block registers (PIEACK, PIEIFR, PIEIER) can be accessed even when the PIE
block is disabled.
1 When ENPIE is set to 1, all vectors, except for reset, are fetched from the PIE vector table. The
reset vector is always fetched from the boot ROM.
Figure 1-74. PIE, Acknowledge (PIEACK) Register
11
Copyright © 2012–2019, Texas Instruments Incorporated
NMIWDPRD
R/W-0xFFFF
PIEACK
R/W1C-1
System Control Registers
1 0
ENPIE
R/W-0
System Control and Interrupts
0
0
211