Clock Configuration Semaphore; Flash Pump Allocation For Different States Of Flash Pump Semaphore - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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As both banks are controlled by a single flash pump, the control signals to the pump will be controlled by
either the C28x-Flash Module Controller or the M3-Flash Module Controller based on a hardware
semaphore called flash pump semaphore (PUMPREQUEST). This semaphore can be accessed by both
cores on their respective memory maps in the IPC register space. This flash pump semaphore is called
MPUMPREQUEST on the M3 memory map and CPUMPREQUEST on the C28x memory map.
26 shows flash pump allocation for different states of the flash pump semaphore (a 2-bit field called SEM
in PUMPREQUEST registers).
Figure 1-26. Flash Pump Allocation for Different States of Flash Pump Semaphore
M3 should write "10" to gain pump control
before erasing/programming the M3 Flash
bank
M3 should write "00" to relinquish
pump ownership after an erase/program
is complete
Semaphore state "10"
Pump Mapped to M3
C28x will not be able to gain pump control
when the semaphore is in this state
By default at reset, the flash pump is mapped to the M3 with a semaphore value of "00". Even though the
pump is mapped to the M3 by default, the M3 should gain the pump by writing a value of "10" in the
MPUMPREQUEST register when the M3 wants to erase/program the M3 flash bank. This prevents the
C28x from grabbing the pump semaphore when the M3 is erasing/programming its bank. Once the M3 is
done erasing/programming its bank, it should release the pump control by writing a value of "00" in to
MPUMPREQUEST semaphore so that the C28x can grab pump control when needed.
Similarly, the C28x should gain the pump by writing a value of "01" in the CPUMPREQUEST register
when the C28x wants to erase/program the C28x flash bank. This prevents the M3 from grabbing the
pump semaphore when the C28x is erasing/programming its bank. Once the C28x is done
erasing/programming its bank, it should release the pump control by writing a value of "00" to the
CPUMPREQUEST semaphore so that the M3 can grab pump control when needed. In case of a conflict
when both the M3 and C28x simultaneously try to gain pump control by writing appropriate values to the
above registers, the M3 will gain pump control.

1.12.8 Clock Configuration Semaphore

The M3 has control over the device clock configuration registers by default. However, in order to allow the
C28x core to erase/program its flash bank independent of the M3 core, a hardware clock configuration
semaphore (CLKREQUEST) is provided so that the C28 CPU can get write access to configure the
SYSPLLCTL, SYSPLLMULT, SYSPLLSTS, and SYSDIVSEL registers for the required frequency. This
semaphore can be accessed by both cores on their respective memory maps in the IPC register space.
The clock configuration semaphore is called MCLKREQUEST on the M3 memory map and
CCLKREQUEST on the C28x memory map.
registers for different states of the clock configuration semaphore (a 2-bit field called SEM in
CLKREQUEST registers).
SPRUHE8E – October 2012 – Revised November 2019
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Semaphore state "00"
(Default at Reset)
Pump Mapped to M3
Not allowed
Not allowed
Figure 1-27
Copyright © 2012–2019, Texas Instruments Incorporated
Inter Processor Communications (IPC)
C28x should write "01" to gain pump control
before erasing/programming the C28x Flash
bank
C28x should write "00" to relinquish
pump ownership after erase/program
is complete
Semaphore state "01"
Pump Mapped to C28x
M3 will not be able to gain pump
when the semaphore is in this state
shows the mastership of clock configuration
System Control and Interrupts
Figure 1-
before
control
163