Missing Clock Enable (Mclken) Register; Missing Clock Reference Limit (Mclklimit) Register; Missing Clock Force (Mclkfrcclr) Register Field Descriptions; Missing Clock Enable (Mclken) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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System Control Registers

Table 1-102. Missing Clock Force (MCLKFRCCLR) Register Field Descriptions

1.13.6.5 Missing Clock Enable (MCLKEN) Register

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 1-103. Missing Clock Enable (MCLKEN) Register Field Descriptions

Figure 1-93. Missing Clock Reference Limit (MCLKLIMIT) Register

REFCLKHILIMIT

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

System Control and Interrupts

Missing Clock Status Flag

Write "1" to this bit to clear the MCLKFLG bit in the MCLKSTAT register. Always reads "0".

Note: Hardware should switch the clock source to the oscillator reference clock input only when the

missing clock condition is cleared by software.

MCLKSTS remains in the same state.

Clear MCLKSTS to "0".

Reference Clock Off

Setting this bit will switch off reference clocks to the missing clock detection circuit, thereby forcing

a clock missing condition in the design. Used for software development and test.

Enable reference clock input to the missing clock logic.

Force reference clock off to the missing clock logic.

Figure 1-92. Missing Clock Enable (MCLKEN) Register

Missing Clock NMI Enable

When set, the missing clock logic will generate an NMI input to the M3 and C28 CPUs when a

clock missing condition is detected.

This bit can be used along with REFCLKOFF bit to test software and debug.

Missing clock detection will not generate an NMI to the M3 and C28 CPUs.

Missing clock NMI will be sent to the M3 and C28 CPUs.

SPRUHE8E – October 2012 – Revised November 2019

REFCLKLOLIMIT

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