Do's And Don'ts To Protect Security Logic; Μcrc Module; Functional Description; Zone Ecsl Status - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Code Security Module (CSM)
ECSL-ARMED
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1
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1.10.4 Do's and Don'ts to Protect Security Logic

1.10.4.1 Do's
• Recheck the password stored in the password locations before programming the COFF file using flash
utilities.
• Program the PASSWDLOCK field of the OTPSECLOCK register with a value other than "0x1111" to
secure the device. The flow of code execution can freely toggle back and forth between secure
memory and unsecure memory without compromising security.
1.10.4.2 Don'ts
• If code security is desired, do not embed the password in your application anywhere other than in the
password locations or security can be compromised.
• Do not use 128 bits of all zeros as the password. This automatically secures the zone regardless of the
contents of the CSMKEY register. The code in that zone is not debuggable nor reprogrammable.
• Do not pull a reset during an erase operation on the flash array. This can leave either zeros or an
unknown value in the password locations. If the password locations are all zero during a reset, the
zone will always be secure regardless of the contents of the KEY register
1.11 µCRC Module
The µCRC module is part of the master subsystem. This module can be used by M3 software to compute
CRC on data/program data, stored at memory locations which are addressible by the M3 subsystem. The
M3 flash bank and ROM are mapped to the code space which is only accessed by the ICODE/DCODE
bus of the M3. RAMs are mapped on the SRAM space which is accessible by the SYSTEM bus. Hence,
the µCRC module snoops both the DCODE and SYSTEM buses to support CRC calculation for
data/program data.

1.11.1 Functional Description

The µCRC module snoops both the DCODE and SYSTEM buses to support CRC calculation for
data/program data. To allow interrupts to execute in between CRC calculations for a block of data, and to
discard the Cortex-M3 literal pool accesses in between execution of the program, (which reads data for
CRC calculation) the M3 ROM, Flash, and RAMs are mapped to a mirrored memory location (refer to the
device data manual for addresses of mirrored memory space). The µCRC module grabs data from the bus
to calculate CRC only if the address of read data belongs to mirrored memory space. After grabbing the
data, the µCRC module performs the CRC calculation on grabbed data and updates the µCRCRES
register. This register can be read any time to get the calculated CRC for all the previous read data at any
time. The µCRC module only supports CRC calculation for byte accesses. This means to calculate the
CRC on a block of data, software must do byte accesses to all the data to calculate CRC. For half-word
and word accesses, the µCRC module discards the data and does not update.
NOTE: If a read to mirrored address space is thrown from the debugger (CCS or any other debug
platform), the uCRC module ignores the read data and does not update the CRC result for
that perticual read.
156
System Control and Interrupts
Table 1-34. Zone ECSL Status
ECSL-ALLZERO ECSL-ALLONE
X
0
1
0
0
Copyright © 2012–2019, Texas Instruments Incorporated
ECSL-MATCH
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0 0
0 X
1 X
0 1
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
ZONE ECSL
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ENABLE
ENABLE
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