Timer Output Enable Register M (Toem) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

6.3.9 Timer output enable register m (TOEm)

The TOEm register is used to enable or disable timer output of each channel.
Channel n for which timer output has been enabled becomes unable to rewrite the value of the TOmn bit of timer
output register m (TOm) described later by software, and the value reflecting the setting of the timer output function
through the count operation is output from the timer output pin (TOmn).
The TOEm register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of the TOEm register can be set with a 1-bit or 8-bit memory manipulation instruction with TOEmL.
Reset signal generation clears this register to 0000H.
Address: F01BAH, F01BBH (TOE0)
Symbol 15 14
TOEm 0 0
TOE
mn
0 Disable output of timer.
Without reflecting on TOmn bit timer operation, to fixed the output.
Writing to the TOmn bit is enabled and the level set in the TOmn bit is output from the TOmn pin.
1 Enable output of timer.
Reflected in the TOmn bit timer operation, to generate the output waveform.
Writing to the TOmn bit is disabled (writing is ignored).
Caution Be sure to clear bits 15 to 4 to "0".
Remark m: Unit number (m = 0), n: Channel number (n = 0 to 3)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 6-17. Format of Timer Output Enable register m (TOEm)
After reset: 0000H
13 12 11 10
0 0 0 0
Timer output enable/disable of channel n
R/W
9 8 7 6
0 0 0 0
CHAPTER 6 TIMER ARRAY UNIT
5 4 3 2
0 0 TOE TOE TOE
m3 m2
1 0
TOE
m1 m0
152