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S3C6400X RISC MICROPROCESSOR
PCM INTERRUPT STATUS REGISTER
The PCM_IRQ_STAT register is used to report IRQ status.
Register
PCM_IRQ_STAT
0x7F009014
0x7F00A014
The bit definitions for the PCM_IRQ_STATUS Register are described below:
PCM_IRQ_STAT
Reserved
IRQ_PENDING
TRANSFER_DONE
TXFIFO_EMPTY
TXFIFO_ALMOST_EMPTY
TXFIFO_FULL
Address
R/W
R
Bit
[31:14]
Reserved
[13]
Controls whether or not the PCM interrupt is sent to
the ARM
1: PCM IRQ is forwarded to ARM
0: PCM IRQ is NOT forwarded to ARM
[12]
Interrupt is generated every time the serial shift for a
word completes
1: IRQ source enabled
0: IRQ source disabled
[11]
Interrupt is generated whenever the TxFIFO is empty
1: IRQ source enabled
0: IRQ source disabled
[10]
Interrupt is generated whenever the TxFIFO is
ALMOST empty.
Almost empty is defined as FIXME words remaining
1: IRQ source enabled
0: IRQ source disabled
[9]
Interrupt is generated whenever the TxFIFO is full
1: IRQ source enabled
0: IRQ source disabled
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
PCM Interrupt Status
Description
PCM AUDIO INTERFACE
Reset Value
0x00000000
Initial State
0
0
0
0
0
37-15
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