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PCM AUDIO INTERFACE
PCM FIFO STATUS REGISTER
The PCM_FIFO_STAT register is used to report FIFO status.
Register
PCM_FIFO_STAT
0x7F009018
0x7F00A018
The bit definitions for the PCM_IRQ_STATUS Register are described below:
PCM_FIFO_STAT
Reserved
TXFIFO_COUNT
TXFIFO_EMPTY
TXFIFO_ALMOST_EMPTY
TXFIFO_FULL
TXFIFO_ALMOST_FULL
RXFIFO_COUNT
RXFIFO_EMPTY
RXFIFO_ALMOST_EMPTY
RX_FIFO_FULL
RX_FIFO_ALMOST_FULL
PCM INTERRUPT CLEAR REGISTER
The PCM_CLRINT register is used to clear the interrupt. Interrupt service routine is responsible for clearing
interrupt asserted. Writing any values on this register clears interrupts for ARM. Reading this register is not
allowed. Clearing interrupt must be prior to resolving the interrupt condition; otherwise another interrupt that would
occur after this interrupt may be ignored.
Register
PCM_CLRINT
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
37-18
Specifications and information herein are subject to change without notice.
Address
R/W
R
Bit
[31:20]
Reserved
[19:14]
To indicate TXFIFO usage.
[13]
To indicate whether TXFIFO is empty.
[12]
To indicate whether TXFIFO is almost empty.
[11]
To indicate whether TXFIFO is full.
[10]
To indicate whether TXFIFO is almost full.
[9:4]
To indicate RXFIFO usage.
[3]
To indicate whether RXFIFO is empty.
[2]
To indicate whether RXFIFO is almost empty.
[1]
To indicate whether RXFIFO is full.
[0]
To indicate whether RXFIFO is almost full.
Address
R/W
0x7F009020
W
0x7F00A020
S3C6400X RISC MICROPROCESSOR
Description
PCM FIFO Status
Description
Description
PCM INTERRUPT CLEAR
Reset Value
0x00000000
Initial State
0
0
0
0
0
0
0
0
0
Reset Value
-
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