ST STM32L4+ Series Reference Manual page 1468

Basic timers (TIM6/TIM7)
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
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Figure 431. Counter timing diagram, internal clock divided by 2
CK_PSC
CNT_EN
0034
(UIF)
Figure 432. Counter timing diagram, internal clock divided by 4
CK_PSC
CNT_EN
0035
(UIF)
RM0432 Rev 6
0035 0036 0000
0036
RM0432
0001 0002 0003
MS31079V2
0000 0001
MS31080V2