ST STM32L4+ Series Reference Manual page 1459

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Bit 9 BKINP: BRK BKIN input polarity

This bit selects the BKIN alternate function input sensitivity. It must be programmed together

with the BKP polarity bit.

0: BKIN input is active low

1: BKIN input is active high

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

Bit 8 BKDF1BK1E: BRK dfsdm1_break[1] enable

This bit enables the dfsdm1_break[1] for the timer's BRK input. dfsdm1_break[1] output is

'ORed' with the other BRK sources.

0: dfsdm1_break[1] input disabled

1: dfsdm1_break[1] input enabled

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

Bits 7:3 Reserved, must be kept at reset value.

Bit 2 BKCMP2E: BRK COMP2 enable

This bit enables the COMP2 for the timer's BRK input. COMP2 output is 'ORed' with the

other BRK sources.

0: COMP2 input disabled

1: COMP2 input enabled

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

Bit 1 BKCMP1E: BRK COMP1 enable

This bit enables the COMP1 for the timer's BRK input. COMP1 output is 'ORed' with the

other BRK sources.

0: COMP1 input disabled

1: COMP1 input enabled

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

Bit 0 BKINE: BRK BKIN input enable

This bit enables the BKIN alternate function input for the timer's BRK input. BKIN input is

'ORed' with the other BRK sources.

0: BKIN input disabled

1: BKIN input enabled

Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits

TIM17 option register 1 (TIM17_OR1)

Address offset: 0x50

Reset value: 0x0000

in TIMx_BDTR register).

General-purpose timers (TIM15/TIM16/TIM17)

RM0432 Rev 6

TI1_RMP[1:0]

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