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by the modulator in transmit mode. The demodulator uses this field to find the byte boundaries in the
stream of bits. The sync word also functions as a system identifier, because only packets with the correct
predefined sync word are received if the sync word detection in RX is enabled in register MDMCFG2 (see
Section
3.13.1). The sync word detector correlates against the user-configured 16- or 32-bit sync word.
The correlation threshold can be set to 15/16, 16/16, or 30/32 bits match. The sync word can be further
qualified using the preamble quality indicator mechanism described below and/or a carrier sense
condition. The sync word is configured through the SYNC1 and SYNC0 registers.
To make false detections of sync words less likely, a mechanism called preamble quality indication (PQI)
can be used to qualify the sync word. A threshold value for the preamble quality must be exceeded in
order for a detected sync word to be accepted. See
3.11 Packet Handling Hardware Support
The CC11x1-Q1 has built-in hardware support for packet oriented radio protocols.
In transmit mode, the packet handler can be configured to add the following elements to the packet stored
in the TX FIFO:
•
A programmable number of preamble bytes
•
A two byte synchronization (sync) word. Can be duplicated to give a 4-byte sync word (recommended).
It is not possible to insert only preamble or insert only a sync word.
•
A CRC checksum computed over the data field.
The recommended setting is 4-byte preamble and 4-byte sync word, except for 500 kBaud data rate
where the recommended preamble length is 8 bytes.
In addition, the following can be implemented on the data field and the optional 2-byte CRC checksum:
•
Whitening of the data with a PN9 sequence.
•
Forward error correction by the use of interleaving and coding of the data (convolutional coding)
In receive mode, the packet handling support deconstructs the data packet by implementing the following
(if enabled):
•
Preamble detection
•
Sync word detection
•
CRC computation and CRC check
•
One byte address check
•
Packet length check (length byte checked against a programmable maximum length)
•
Dewhitening
•
Deinterleaving and decoding
Optionally, two status bytes (see
CRC status can be appended in the RX FIFO.
Table 3-7. Received Packet Status Byte 1 (First Byte Appended After Data)
BIT
7:0
Table 3-8. Received Packet Status Byte 2 (Second Byte Appended After Data)
BIT
7
6:0
Copyright © 2009–2010, Texas Instruments Incorporated
Table 3-7
FIELD NAME
DESCRIPTION
RSSI
RSSI value
FIELD NAME
DESCRIPTION
CRC_OK
1: CRC for received data OK (or CRC disabled)
0: CRC error in received data
LQI
Indicating the link quality
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SWRS076B – 11-07-22-013 - APRIL 2009 – REVISED APRIL 2010
Section 3.13.2
for more details.
and
Table
3-8) with RSSI value, Link Quality Indication, and
CC11x1-Q1
Detailed Description
31
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