Hardware Trigger No-Wait Mode (Select Mode, Sequential Conversion Mode) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

9.6.5 Hardware trigger no-wait mode (select mode, sequential conversion mode)

<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time
place the system in the hardware trigger standby status (and conversion does not start at this stage). Note that,
while in this status, A/D conversion does not start even if ADCS is set to 1.
<3> If a hardware trigger is input while ADCS = 1, A/D conversion is performed on the analog input specified by the
analog input channel specification register (ADS).
<4> When A/D conversion ends, the conversion result is stored in the A/D conversion result register (ADCR, ADCRH),
and the A/D conversion end interrupt request signal (INTAD) is generated. After A/D conversion ends, the next
A/D conversion immediately starts.
<5> If a hardware trigger is input during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<6> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the analog input respecified by the ADS register.
The partially converted data is discarded.
<7> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<8> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the
system enters the A/D conversion standby status. However, the A/D converter does not stop in this status.
<9> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCS = 0, inputting a hardware trigger is ignored and A/D conversion does not start.
Note If a high-accuracy channel is selected as the analog input channel: Stabilization wait time = 0.5
If a standard channel is selected as the analog input channel:
Figure 9-21. Example of Hardware Trigger No-Wait Mode (Select Mode, Sequential Conversion Mode)
<1> ADCE is set to 1.
ADCE
<2> ADCS is set to 1.
Hardware
trigger
Trigger
The trigger is not standby
status
acknowledged.
ADCS
ADS
A/D
Stop Conversion
conversion
status standby
status
ADCR,
ADCRH
INTAD
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Operation Timing
<3> A hardware trigger is <5>
generated.
ANI0
<4>
A/D conversion ends
and the next conversion
<4>
starts.
Data 1 Data 2 Data 3
(ANI0) (ANI0) (ANI0)
Data 1 Data 2
(ANI0) (ANI0)
Note , the ADCS bit of the ADM0 register is set to 1 to
Stabilization wait time = 2
A hardware trigger is
generated during A/D
conversion operation.
ADCS is overwritten
with 1 during A/D
conversion operation.
ADS is rewritten during
<6>
A/D conversion operation
(from ANI0 to ANI1).
Conversion is
Conversion is
interrupted
<4>
interrupted
and restarts.
and restarts.
Data 4 Data 5 Data 6
(ANI0) (ANI0) (ANI1)
Data 4
(ANI0)
CHAPTER 9 A/D CONVERTER


s
ADCE is cleared to 0. <9>
The trigger is not
acknowledged.
<7> ADCS is cleared <8>
to 0 during A/D
conversion operation.
ANI1
Conversion is
interrupted and
Conversion
restarts.
<4> <4>
is interrupted.
Data 7 Data 8 Data 9
Conversion
(ANI1) (ANI1) (ANI1) standby
Data 6 Data 8
(ANI1) (ANI1)
s
Stop
status
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