Renesas RL78/G1P Hardware User Manual page 635

RL78/G1P
17.2 Register for Confirming Reset Source
17.2.1 Reset control flag register (RESF)
Many internal reset generation sources exist in the RL78/G1P. The reset control flag register (RESF) is used to store
which source has generated the reset request.
The RESF register can be read by an 8-bit memory manipulation instruction.
RESET input, reset by power-on-reset (POR) circuit, and reading the RESF register clear TRAP, WDTRF, RPERF,
IAWRF, and LVIRF flags.
Address: FFFA8H
Symbol 7
RESF TRAP
TRAP
0
1
WDTRF
0
1
RPERF
0
1
IAWRF
0
1
LVIRF
0
1
Notes 1. The value after reset varies depending on the reset source. See Table 17-3.
2. The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.
Cautions 1. Do not read data by a 1-bit memory manipulation instruction.
2. When enabling RAM parity error resets (RPERDIS = 0), be sure to initialize the used RAM area at
data access or the used RAM area + 10 bytes at execution of instruction from the RAM area.
Reset generation enables RAM parity error resets (RPERDIS = 0). For details, see 20.5 RAM
parity error detection function.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 17-4. Format of Reset Control Flag Register (RESF)
Note 1
After reset: 00H R
6 5
0 0
Internal reset request by execution of illegal instruction
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
Internal reset request is not generated, or the RESF register is cleared.
Internal reset request is generated.
4 3
WDTRF 0
Internal reset request by watchdog timer (WDT)
Internal reset request by RAM parity
Internal reset request by illegal-memory access
Internal reset request by voltage detector (LVD)
CHAPTER 17 RESET FUNCTION
2 1
RPERF IAWRF LVIRF
Note 2
0
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