Renesas RL78/G1P Hardware User Manual page 583

16-bit single-chip microcontroller

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Figure 13-9. Example of Setting for UART Consecutive Reception + ACK Transmission

DRA0 = FE00H

DBC0 = 0040H

Setting for UART reception

User program

Note The DST0 flag is automatically cleared to 0 when a DMA transfer is completed.

Writing the DEN0 flag is enabled only when DST0 = 0. To terminate a DMA transfer without waiting for

occurrence of the interrupt of DMA0 (INTDMA0), set the DST0 bit to 0 and then the DEN0 bit to 0 (for details,

see 13.5.5 Forced termination by software).

This is an example where a software trigger is used as a DMA start source.

If ACK is not transmitted and if only data is consecutively received from UART, the UART reception end

interrupt (INTSR0) can be used to start DMA for data reception.

R01UH0895EJ0100 Rev.1.00

Nov 29, 2019

INTSR0 occurs.

CHAPTER 13 DMA CONTROLLER

INTSR0 interrupt routine

DMA0 transfer

Hardware operation