Software Trigger Mode (Select Mode, One-Shot Conversion Mode) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

9.6.2 Software trigger mode (select mode, one-shot conversion mode)

<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time
perform the A/D conversion of the analog input specified by the analog input channel specification register (ADS).
<3> When A/D conversion ends, the conversion result is stored in the A/D conversion result register (ADCR, ADCRH),
and the A/D conversion end interrupt request signal (INTAD) is generated.
<4> After A/D conversion ends, the ADCS bit is automatically cleared to 0, and the system enters the A/D conversion
standby status.
<5> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<6> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the analog input respecified by the ADS register.
The partially converted data is discarded.
<7> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the
system enters the A/D conversion standby status.
<8> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCE = 0, specifying 1 for ADCS is ignored and A/D conversion does not start.
conversion does not start even if a hardware trigger is input while in the A/D conversion standby status.
Note If a high-accuracy channel is selected as the analog input channel: Stabilization wait time = 0.5
If a standard channel is selected as the analog input channel:
Figure 9-18. Example of Software Trigger Mode (Select Mode, One-Shot Conversion Mode) Operation Timing
<1> ADCE is set to 1.
ADCE
ADCS is set to
<2>
1 while in the
The trigger
conversion
is not
standby status.
acknowledged.
ADCS
ADS
Stop
A/D
Conversion
conversion status
standby
status
ADCR,
ADCRH
INTAD
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
ADCS is overwritten
ADCS is
<4> <2> <5>
with 1 during A/D
automatically
conversion
cleared to 0
after operation.
conversion
ends.
ANI0
A/D Conversion is
<3>
conversion interrupted and
ends. restarts.
Data 2 Data 3
Data 1 Conversion
(ANI0) standby (ANI0)
Data 1
(ANI0)
Note , the ADCS bit of the ADM0 register is set to 1 to
<4> <2>
<6>
ADS is rewritten during
A/D conversion operation
(from ANI0 to ANI1).
<3>
Data 4
Conversion
(ANI0) standby (ANI0)
Data 3
(ANI0)
CHAPTER 9 A/D CONVERTER
Stabilization wait time = 2
ADCE is cleared to 0. <8>
<4> <2>
<7> ADCS is
cleared to 0
during A/D
conversion
operation.
ANI1
Conversion is
<3>
interrupted.
Data 5 Data 6 Conversion
Conversion
(ANI1) (ANI1) standby
standby
Data 5
(ANI1)
In addition, A/D

s

s
The trigger
is not
acknowledged.
Stop
status
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