Renesas RL78/G1P Hardware User Manual page 621

RL78/G1P
speed on-chip oscillator clock before the execution of the STOP instruction. Before changing the
CPU clock from the high-speed on-chip oscillator clock to the high-speed system clock (X1
oscillation) after the STOP mode is released, check the oscillation stabilization time with the
oscillation stabilization time counter status register (OSTC).
Remarks 1. Operation stopped: Operation is automatically stopped before switching to the STOP mode.
Operation disabled: Operation is stopped before switching to the STOP mode.
f : High-speed on-chip oscillator clock
IH
f : X1 clock
X
2. p = 00; q = 0
(2) STOP mode release
The STOP mode can be released by the following two sources.
(a) Release by unmasked interrupt request
When an unmasked interrupt request is generated, the STOP mode is released. After the oscillation stabilization
time has elapsed, if interrupt acknowledgment is enabled, vectored interrupt servicing is carried out. If interrupt
acknowledgment is disabled, the next address instruction is executed.
Figure 16-5. STOP Mode Release by Interrupt Request Generation (1/2)
(1) When high-speed system clock (X1 oscillation) is used as CPU clock
Standby release signal
Status of CPU
High-speed
system clock
(X1 oscillation)
Notes 1. For details of the standby release signal, see Figure 15-1.
2. STOP mode release time
Supply of the clock is stopped:
 18
Wait:
 When vectored interrupt servicing is carried out:
 When vectored interrupt servicing is not carried out: 4 to 5 clocks
Caution To reduce the oscillation stabilization time after release from the STOP mode while CPU operates
based on the high-speed system clock (X1 oscillation), switch the clock to the high-speed on-chip
oscillator clock temporarily before executing the STOP instruction.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
STOP
instruction
Note 1
Normal operation
(high-speed
system clock) STOP mode
Oscillates Oscillation stopped
 s to "whichever is longer 65 s or the oscillation stabilization time (set by OSTS)"
CHAPTER 16 STANDBY FUNCTION
f : Low-speed on-chip oscillator clock
IL
f : External main system clock
EX
Interrupt
request
STOP mode release time
Supply of the
clock is stopped
Oscillates
10 to 11 clocks
Note 2
Normal operation
(high-speed
system clock)
Wait
602