Renesas RL78/G1P Hardware User Manual page 764

RL78/G1P
27.9 Timing of Entry to Flash Memory Programming Modes
Parameter
How long from when an external
reset ends until the initial
communication settings are
specified
How long from when the TOOL0
pin is placed at the low level until
an external reset ends
How long the TOOL0 pin must be
kept at the low level after an
external reset ends
(excluding the processing time of
the firmware to control the flash
memory)
Remark t : The segment shows that it is necessary to finish specifying the initial communication settings within
SUINIT
100 ms from when the resets end.
t : How long from when the TOOL0 pin is placed at the low level until an external reset ends (MIN. 10
SU
t : How long to keep the TOOL0 pin at the low level from when the external and internal resets end
HD
(except software processing time)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Symbol
t POR and LVD reset must end before the
SUINIT
external reset ends.
t POR and LVD reset must end before the
SU
external reset ends.
t POR and LVD reset must end before the
HD
external reset ends.
<1>
RESET
TOOL0
t
SU
<1> The low level is input to the TOOL0 pin.
<2> The external reset ends (POR and LVD reset must end before the external reset ends.).
<3> The TOOL0 pin is set to the high level.
<4> Setting of the flash memory programming mode by UART reception and complete the baud
rate setting.
CHAPTER 27 ELECTRICAL SPECIFICATIONS
Conditions
<2>
<3>
723 μs + t
HD
processing
00H reception
time
(TOOLRxD, TOOLTxD mode)
t
SUINIT
MIN. TYP. MAX.
100
10
1
<4>
Unit
ms
 s 
ms

s)
745