Renesas RL78/G1P Hardware User Manual page 371

RL78/G1P
(2) Operation procedure
Setting the PER0 register
Setting the SPSm register
Setting the SMRmn register
Setting the SCRmn register
Setting the SDRmn register
Writing to the SSm register
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 11-33. Initial Setting Procedure for Master Reception
Starting initial setting
Setting the SOm register
Setting port
End of initial setting
CHAPTER 11 SERIAL ARRAY UNIT
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate (setting the
transfer clock by dividing the operation
clock (f )).
MCK
Set the initial output level of the serial
clock (CKOmn).
Enable clock output of the target channel
by setting a port register and a port mode
register.
Set the SSmn bit of the target channel to 1
(SEmn bit = 1: to enable operation).
Initial setting is completed.
Set dummy data to the SIOp register (bits
7 to 0 of the SDRmn register) and start
communication.
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