Renesas RL78/G1P Hardware User Manual page 529

RL78/G1P
interrupt occurs?
No
interrupt occurs?
No
EXCn = 1 or COIn = 1?
Remarks 1. Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
2. To use the device as a master in a multi-master system, read the MSTSn bit each time interrupt
INTIICAn has occurred to check the arbitration result.
3. To use the device as a slave in a multi-master system, check the status by using the IICA status register
n (IICSn) and IICA flag register n (IICFn) each time interrupt INTIICAn has occurred, and determine the
processing to be performed next.
4. n = 0, 1
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 12-29. Master Operation in Multi-Master System (3/3)
C
Starts communication
Writing IICAn
(specifies an address and transfer direction).
INTIICAn
No
Waits for detection of ACK.
Yes
No
MSTSn = 1?
Yes
ACKDn = 1?
Yes
No
TRCn = 1?
Yes
WTIMn = 1
Writing IICAn
Starts transmission.
INTIICAn
No
Waits for data transmission.
Yes
No
MSTSn = 1?
Yes
No
ACKDn = 1?
Yes
Transfer end?
Yes
No
Restart?
SPTn = 1
Yes
STTn = 1
C
2
No
Yes
Does not participate
Slave operation
in communication.
CHAPTER 12 SERIAL INTERFACE IICA
2
2
WTIMn = WRELn = 1
END
1
ACKEn = 1
WTIMn = 0
WRELn = 1
Starts reception.
INTIICAn
No
interrupt occurs?
Waits for data reception.
Yes
No
MSTSn = 1?
Yes
Reading IICAn
No
Transfer end?
Yes
ACKEn = 00
INTIICAn
No
interrupt occurs?
Waits for detection of ACK.
Yes
No
MSTSn = 1?
Yes
2
2
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