Renesas RL78/G1P Hardware User Manual page 202

RL78/G1P
Figure 6-43. Example of Set Contents of Registers During Operation as Interval Timer/Square Wave Output (2/2)
(d) Timer output level register m (TOLm)
Bit n
TOLm
TOLmn
0
(e) Timer output mode register m (TOMm)
Bit n
TOMm
TOMmn
0
Remark m: Unit number (m = 0), n: Channel number (n = 0 to 3)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
0: Cleared to 0 when TOMmn = 0 (master channel output mode)
0: Sets master channel output mode.
CHAPTER 6 TIMER ARRAY UNIT
183