Renesas RL78/G1P Hardware User Manual page 204

RL78/G1P
Figure 6-44. Operation Procedure of Interval Timer/Square Wave Output Function (2/2)
To hold the TOmn pin output level
TAU
Clears the TOmn bit to 0 after the value to
stop
be held is set to the port register.
When holding the TOmn pin output level is not necessary
Setting not required.
The TAUmEN bit of the PER0 register is cleared to 0.
m: Unit number (m = 0), n: Channel number (n = 0 to 3)
Remark
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Software Operation
CHAPTER 6 TIMER ARRAY UNIT
Hardware Status
The TOmn pin output level is held by port function.
Input clock supply for timer array unit 0 is stopped.
All circuits are initialized and SFR of each channel is also
initialized.
(The TOmn bit is cleared to 0 and the TOmn pin is set to
port mode.)
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