Renesas RL78/G1P Hardware User Manual page 632

RL78/G1P
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM Data memory
General-purpose registers
Processor mode control register (PMC)
Port registers (P1 to P4, P6, P12, P13) (output latches)
Port mode registers (PM1 to PM4, PM6)
Port mode control register 1 (PMC1)
Pull-up resistor option registers (PU1, PU3, PU4)
Clock operation mode control register (CMC)
Clock operation status control register (CSC)
System clock control register (CKC)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
Noise filter enable registers 0, 1 (NFEN0, NFEN1)
Peripheral enable register 0 (PER0)
Peripheral enable register 1 (PER1)
High-speed on-chip oscillator frequency select register (HOCODIV)
High-speed on-chip oscillator trimming register (HIOTRM)
Timer array unit Timer data registers 00 to 03 (TDR00 to TDR03)
Timer mode registers 00 to 03 (TMR00 to TMR03)
Timer status registers 00 to 03 (TSR00 to TSR03)
Timer input select register 0 (TIS0)
Timer counter registers 00 to 03 (TCR00 to TCR03)
Timer channel enable status register 0 (TE0)
Timer channel start register 0 (TS0)
Timer channel stop register 0 (TT0)
Timer clock select register 0 (TPS0)
Timer output register 0 (TO0)
Timer output enable register 0 (TOE0)
Timer output level register 0 (TOL0)
Timer output mode register 0 (TOM0)
Notes 1. During reset signal generation or oscillation stabilization time wait, only the PC contents among the hardware
statuses become undefined. All other hardware statuses remain unchanged after reset.
2. The reset value differs for each chip.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 17-2. Hardware Statuses After Reset Acknowledgment (1/3)
Hardware
CHAPTER 17 RESET FUNCTION
After Reset
Acknowledgment
The contents of the reset
vector table (00000H,
00001H) are set.
Undefined
06H
Undefined
Undefined
00H
00H
FFH
FFH
00H (PU4 is 01H)
00H
C0H
00H
00H
07H
00H
00H
00H
Undefined
Undefined
0000H
0000H
0000H
00H
FFFFH
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
Note 1
Note 2
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