Renesas RL78/G1P Hardware User Manual page 231

RL78/G1P
Master channel
(interval timer mode)
CKm1
Operation clock
CKm0
TSmn
Slave channel
(one-count mode)
CKm1
Operation clock
CKm0
Remark m: Unit number (m = 0), n: Master channel number (n = 0, 2)
p: Slave channel number (n = 0: p = 1, 2, 3, n = 2: p = 3)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 6-66. Block Diagram of Operation as PWM Function
CHAPTER 6 TIMER ARRAY UNIT
Timer counter
register mn (TCRmn)
Timer data
register mn (TDRmn)
Timer counter
register mp (TCRmp)
Timer data
register mp (TDRmp)
Interrupt
Interrupt signal
controller
(INTTMmn)
Output
TOmp pin
controller
Interrupt
Interrupt signal
controller
(INTTMmp)
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