Renesas RL78/G1P Hardware User Manual page 224

RL78/G1P
Figure 6-61. Block Diagram of Operation as One-Shot Pulse Output Function
Master channel
(one-count mode)
Operation clock
TNFENmn
Noise
TImn pin
filter
Slave channel
(one-count mode)
Operation clock
m: Unit number (m = 0), n: Master channel number (n = 0, 2)
Remark
p: Slave channel number (n = 0: p = 1, 2, 3, n = 2: p = 3)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
CKm1
CKm0
TSmn
NFEN1 Edge
register detection
CKm1
CKm0
CHAPTER 6 TIMER ARRAY UNIT
Timer counter
register mn (TCRmn)
Timer data
register mn (TDRmn)
Timer counter
register mp (TCRmp)
Timer data
register mp (TDRmp)
Interrupt
Interrupt signal
controller
(INTTMmn)
Output
TOmp pin
controller
Interrupt
Interrupt signal
controller
(INTTMmp)
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