Renesas RL78/G1P Hardware User Manual page 683

RL78/G1P
Address: 000C1H
7
VPOC2
 LVD setting (interrupt & reset mode)
Detection voltage
V V
LVDH LVDL
Rising Falling Falling
edge edge edge
2.92 V 2.86 V 2.75 V
3.02 V 2.96 V
Other than above
 LVD setting (reset mode)
Detection voltage
V
LVD
Rising edge Falling edge
2.81 V 2.75 V
2.92 V 2.86 V
3.02 V 2.96 V
3.13 V 3.06 V
Other than above
 LVD setting (interrupt mode)
Detection voltage
V
LVD
Rising edge Falling edge
2.81 V 2.75 V
2.92 V 2.86 V
3.02 V 2.96 V
3.13 V 3.06 V
Other than above
 LVD setting (LVDOFF)
Detection voltage
V
LVD
Rising edge Falling edge
 
Other than above
Caution Be sure to set bit 4 to "1".
Remarks 1. For details on the LVD circuit, see CHAPTER 19 VOLTAGE DETECTOR
2. The detection voltage is a typical value. For details, see 27.6.5 LVD circuit characteristics.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 22-2. Format of User Option Byte (000C1H)
6 5
VPOC1 VPOC0
Mode setting
LVIMDS1 LVIMDS0
1 0
Setting prohibited
Mode setting
LVIMDS1 LVIMDS0
1 1
Setting prohibited
Mode setting
LVIMDS1 LVIMDS0
0 1
Setting prohibited
Mode setting
LVIMDS1 LVIMDS0
0/1 1
Setting prohibited
4 3
1 LVIS1
Option byte setting value
VPOC2 VPOC1
0 1
Option byte setting value
VPOC2 VPOC1
0 1
1
1
0
Option byte setting value
VPOC2 VPOC1
0 1
1
1
0
Option byte setting value
VPOC2 VPOC1

1
CHAPTER 22 OPTION BYTE
2 1
LVIS0 LVIMDS1 LVIMDS0
VPOC0 LVIS1
1 1
0
VPOC0 LVIS1
1 1
1 1
1 0
1 0
VPOC0 LVIS1
1 1
1 1
1 0
1 0
VPOC0 LVIS1
 
0
LVIS0
0
1
LVIS0
1
0
1
0
LVIS0
1
0
1
0
LVIS0

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