Renesas RL78/G1P Hardware User Manual page 715

RL78/G1P
(2) Subtraction: Calculating the result of subtracting a BCD code value from another BCD code value by using
a BCD code value
<1> The BCD code value from which subtraction is performed is stored in the A register.
<2> By subtracting the value of the second operand (value of BCD code to be subtracted) from the A register as is
in binary, the calculation result in binary is stored in the A register, and the correction value is stored in the
BCD correction result register (BCDADJ).
<3> Decimal correction is performed by subtracting the value of the BCDADJ register (correction value) from the A
register (subtraction result in binary) in binary, and the correction result is stored in the A register and CY flag.
Caution The value read from the BCDADJ register varies depending on the value of the A register
when it is read and those of the CY and AC flags. Therefore, execute the instruction <3>
after the instruction <2> instead of executing any other instructions. To perform BCD
correction in the interrupt enabled state, saving and restoring the A register is required
within the interrupt function. PSW (CY flag and AC flag) is restored by the RETI instruction.
An example is shown below.
Example: 91  52 = 39
Instruction
MOV A, #91H
SUB A, #52H
SUB A, !BCDADJ
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
A Register
; <1>
91H
; <2>
3FH
; <3>
39H
CHAPTER 25 BCD CORRECTION CIRCUIT
CY Flag AC Flag
 
0 1
0 0
BCDADJ
Register

06H

696