Renesas RL78/G1P Hardware User Manual page 711

RL78/G1P
24.2 On-chip Debug Security ID
The RL78/G1P has an on-chip debug operation control bit in the flash memory at 000C3H (see CHAPTER 22 OPTION
BYTE) and an on-chip debug security ID setting area at 000C4H to 000CDH, to prevent third parties from reading memory
content.
000C4H to 000CDH
010C4H to 010CDH
Note
24.3 Securing of User Resources
To perform communication between the RL78/G1P and E1, E2, E2 Lite, E20 on-chip debugging emulator, as well as
each debug function, the securing of memory space must be done beforehand.
If Renesas Electronics assembler or compiler is used, the items can be set by using linker options.
(1) Securement of memory space
The shaded portions in Figure 24-2 are the areas reserved for placing the debug monitor program, so user
programs or data cannot be allocated in these spaces. When using the on-chip debug function, these spaces must
be secured so as not to be used by the user program. Moreover, this area must not be rewritten by the user
program.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 24-1. On-chip Debug Security ID
Address
Any ID code of 10 bytes
The setting FFFFFFFFFFFFFFFFFFFFH for the ID code is not possible.
CHAPTER 24 ON-CHIP DEBUG FUNCTION
On-chip Debug Security ID
Note
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