Renesas RL78/G1P Hardware User Manual page 522

16-bit single-chip microcontroller
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RL78/G1P
(Communication reservation)
Notes 1. The wait time is calculated as follows.
(IICWLn setting value + IICWHn setting value + 4) + t
2. The communication reservation operation executes a write to the IICA shift register n (IICAn) when a
stop condition interrupt request occurs.
Remarks 1. STTn:
MSTSn: Bit 7 of IICA status register n (IICSn)
IICAn:
IICWLn: IICA low-level width setting register n
IICWHn: IICA high-level width setting register n
t
:
F
f
CLK
2. n = 0, 1
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 12-27. Communication Reservation Protocol
DI
SET1 STTn
Define communication
reservation
Wait
Note 2
MSTSn = 0?
Yes
Cancel communication
reservation
MOV IICAn, #××H
EI
Bit 1 of IICA control register n0 (IICCTLn0)
IICA shift register n
SDAAn and SCLAn signal falling times
:
CPU/peripheral hardware clock frequency
CHAPTER 12 SERIAL INTERFACE IICA
Sets STTn flag (communication reservation)
Defines that communication reservation is in effect
(defines and sets user flag to any part of RAM)
Secures wait time
Confirmation of communication reservation
No
(Generate start condition)
Clear user flag
IICAn write operation
 2  f
F
Note 1
by software.
[clocks]
CLK
503

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