Renesas RL78/G1P Hardware User Manual page 482

16-bit single-chip microcontroller
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RL78/G1P
11.7.5 Procedure for processing errors that occurred during UART (UART0) communication
The procedure for processing errors that occurred during UART (UART0) communication is described in Figures 11-
120 and 11-121.
Figure 11-120. Processing Procedure in Case of Parity Error or Overrun Error
Software Manipulation
Reads serial data register mn
(SDRmn).
Reads serial status register mn
(SSRmn).
Writes 1 to serial flag clear trigger
register mn (SIRmn).
Software Manipulation
Reads serial data register mn
(SDRmn).
Reads serial status register mn
(SSRmn).
Writes serial flag clear trigger register mn
(SIRmn).
Sets the STmn bit of serial channel stop
register m (STm) to 1.
Synchronization with other party of
communication
Sets the SSmn bit of serial channel start
register m (SSm) to 1.
Remark
m: Unit number (m = 0), n: Channel number (n = 0, 1), mn = 00, 01
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Hardware Status
The BFFmn bit of the SSRmn register
is set to 0 and channel n is enabled to
receive data.
Error flag is cleared.
Figure 11-121. Processing Procedure in Case of Framing Error
Hardware Status
The BFFmn bit of the SSRmn register
is set to 0 and channel n is enabled to
receive data.
Error flag is cleared.
The SEmn bit of serial channel enable
status register m (SEm) is set to 0 and
channel n stops operating.
The SEmn bit of serial channel enable
status register m (SEm) is set to 1 and
channel n is enabled to operate.
CHAPTER 11 SERIAL ARRAY UNIT
Remark
This is to prevent an overrun error if the
next reception is completed during error
processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read from
the SSRmn register to the SIRmn
register without modification.
Remark
This is to prevent an overrun error if the
next reception is completed during error
processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read from
the SSRmn register to the SIRmn
register without modification.
Synchronization with the other party of
communication is re-established and
communication is resumed because it is
considered that a framing error has
occurred because the start bit has been
shifted.
463

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