Renesas RL78/G1P Hardware User Manual page 191

RL78/G1P
(2) Default level of TOmn pin and output level after timer operation start
The change in the output level of the TOmn pin when timer output register m (TOm) is written while timer output is
disabled (TOEmn = 0), the initial level is changed, and then timer output is enabled (TOEmn = 1) before port output
is enabled, is shown below.
(a) When operation starts with master channel output mode (TOMmn = 0) setting
The setting of timer output level register m (TOLm) is invalid when master channel output mode (TOMmn = 0).
When the timer operation starts after setting the default level, the toggle signal is generated and the output
level of the TOmn pin is reversed.
Figure 6-32. TOmn Pin Output Status at Toggle Output (TOMmn = 0)
mn
TOE
Default
-
Hi Z
status
n
TOm
(output)
Port output is enabled
Remarks 1. Toggle: Reverse TOmn pin output status
2. m: Unit number (m = 0), n: Channel number (n = 0 to 3)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Toggle Toggle Toggle
CHAPTER 6 TIMER ARRAY UNIT
TOmn bit = 0
(Default status : Low)
TOmn bit = 1
(Default status : High)
TOmn bit = 0
(Default status : Low)
TOmn bit = 1
(Default status : High)
Bold : Active level
Toggle Toggle
TOLmn bit = 0
(Active high)
TOLmn bit = 1
(Active low)
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