Hardware Trigger No-Wait Mode (Select Mode, One-Shot Conversion Mode) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

9.6.6 Hardware trigger no-wait mode (select mode, one-shot conversion mode)

<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time
place the system in the hardware trigger standby status (and conversion does not start at this stage). Note that,
while in this status, A/D conversion does not start even if ADCS is set to 1.
<3> If a hardware trigger is input while ADCS = 1, A/D conversion is performed on the analog input specified by the
analog input channel specification register (ADS).
<4> When A/D conversion ends, the conversion result is stored in the A/D conversion result register (ADCR, ADCRH),
and the A/D conversion end interrupt request signal (INTAD) is generated.
<5> After A/D conversion ends, the ADCS bit remains set to 1, and the system enters the A/D conversion standby
status.
<6> If a hardware trigger is input during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<7> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the analog input respecified by the ADS register.
The partially converted data is discarded.
<8> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts. The partially converted data is discarded.
<9> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the
system enters the A/D conversion standby status. However, the A/D converter does not stop in this status.
<10> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCS = 0, inputting a hardware trigger is ignored and A/D conversion does not start.
Note If a high-accuracy channel is selected as the analog input channel: Stabilization wait time = 0.5
If a standard channel is selected as the analog input channel:
Figure 9-22. Example of Hardware Trigger No-Wait Mode (Select Mode, One-Shot Conversion Mode)
<1> ADCE is set to 1.
ADCE
<2> ADCS is set to 1.
<3>
Hardware
trigger
Trigger
The trigger is not
standby
acknowledged.
status
ADCS
ADS ANI0
A/D
Stop
Conversion
conversion
status standby
status
ADCR,
ADCRH
INTAD
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Operation Timing
A hardware trigger A hardware trigger is
<3> <6>
is generated. generated during A/D
conversion operation.
ADCS retains <5>
the value 1.
Conversion is
<4> A/D conversion ends.
interrupted
and restarts.
Data 1 Data 2 Data 3
Conversion
(ANI0) (ANI0) (ANI0)
standby
Data 1
(ANI0)
Note , the ADCS bit of the ADM0 register is set to 1 to
Stabilization wait time = 2
<3>
ADCS is overwritten with 1 during
<5>
<5>
A/D conversion
<7> ADS is rewritten during
A/D conversion
operation
(from ANI0 to ANI1).
ANI1
Conversion is
interrupted
<4> <4>
and restarts.
Data 4 Data 5
Conversion Conversion
(ANI0) (ANI1)
standby standby
Data 3
(ANI0)
CHAPTER 9 A/D CONVERTER

s

s
ADCE is cleared to 0.<10>
<3> <3>
The trigger is not
acknowledged.
ADCS is cleared to 0
<8> <5> <9>
during A/D
operation.
conversion
operation.
Conversion is
Conversion is
interrupted
<4>
interrupted.
and restarts.
Data 6 Data 7 Data 8
Conversion
Conversion
(ANI1) (ANI1) (ANI1)
standby standby
Data 5 Data 7
(ANI1) (ANI1)
Stop
status
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