RL78/G1P
8.1 Functions of Watchdog Timer
The counting operation of the watchdog timer is set by the option byte (000C0H).
The watchdog timer operates on the low-speed on-chip oscillator clock.
The watchdog timer is used to detect an inadvertent program loop. If a program loop is detected, an internal reset
signal is generated.
Program loop is detected in the following cases.
If the watchdog timer counter overflows
If a 1-bit manipulation instruction is executed on the watchdog timer enable register (WDTE)
If data other than "ACH" is written to the WDTE register
If data is written to the WDTE register during a window close period
When a reset occurs due to the watchdog timer, bit 4 (WDTRF) of the reset control flag register (RESF) is set to 1. For
details of the RESF register, see CHAPTER 17 RESET FUNCTION.
When 75% of the overflow time + 1/2/f
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CHAPTER 8 WATCHDOG TIMER
is reached, an interval interrupt can be generated.
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CHAPTER 8 WATCHDOG TIMER
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