Renesas RL78/G1P Hardware User Manual page 279

RL78/G1P
ADCR register value
(A/D conversion result)
1111111111B
0000000000B
Remark If INTAD does not occur, the A/D conversion result is not stored in the ADCR or ADCRH register.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 9-8. ADRCK Bit Interrupt Signal Generation Range
AREA 3
(ADUL < ADCR)
AREA 1
(ADLL ≤ ADCR ≤ ADUL)
AREA 2
(ADCR < ADLL)
CHAPTER 9 A/D CONVERTER
INTAD is generated
when ADRCK = 1.
ADUL register setting
INTAD is generated
when ADRCK = 0.
ADLL register setting
INTAD is generated
when ADRCK = 1.
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