Register Indirect Addressing - Renesas RL78/G1P Hardware User Manual

RL78/G1P
3.3.3 Table indirect addressing
[Function]
Table indirect addressing specifies a table address in the CALLT table area (0080H to 00BFH) with the 5-bit
immediate data in the instruction word, stores the contents at that table address and the next address in the program
counter (PC) as 16-bit data, and specifies the program address. Table indirect addressing is applied only for CALLT
instructions.
In the RL78 microcontrollers, branching is enabled only to the 64 KB space from 00000H to 0FFFFH.

3.3.4 Register indirect addressing

[Function]
Register indirect addressing stores in the program counter (PC) the contents of a general-purpose register pair
(AX/BC/DE/HL) and CS register of the current register bank specified with the instruction word as 20-bit data, and
specifies the program address. Register indirect addressing can be applied only to the CALL AX, BC, DE, HL, and
BR AX instructions.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 3-13. Outline of Table Indirect Addressing
OP code
0 0 0 0 0 0 0 0 10
Table add ress
0000
PC
Figure 3-14. Outline of Register Indirect Addressing
CS
PC
PC
CHAPTER 3 CPU ARCHITECTURE
High Addr.
0
Low Addr.
Memory
PC
PC PC
S
H L
Instruction code
OP code
rp
PC PC
S
H L
49