Based Addressing - Renesas RL78/G1P Hardware User Manual

RL78/G1P

3.4.7 Based addressing

[Function]
Based addressing uses the contents of a register pair specified with the instruction word or 16-bit immediate data as
a base address, and 8-bit immediate data or 16-bit immediate data as offset data. The sum of these values is used
to specify the target address.
[Operand format]
Identifier






Instruction code
<1>
<2> byte
SP (stack pointer) <1> indicates the stack as the
target.
By indicating an offset from the address (top of the
stack) currently pointed to by the stack pointer,
"byte" <2> indicates the target memory (SP + byte).
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
[HL + byte], [DE + byte], [SP + byte] (only the space from F0000H to FFFFFH is specifiable)
word[B], word[C] (only the space from F0000H to FFFFFH is specifiable)
word[BC] (only the space from F0000H to FFFFFH is specifiable)
ES:[HL + byte], ES:[DE + byte] (higher 4-bit addresses are specified by the ES register)
ES:word[B], ES:word[C] (higher 4-bit addresses are specified by the ES register)
ES:word[BC] (higher 4-bit addresses are specified by the ES register)
Figure 3-23. Example of [SP+byte]
<2>
Offset
Specifies a
<1>
stack area
SP
CHAPTER 3 CPU ARCHITECTURE
Description
Target memory
Memory
FFFFFH
Stack area
F0000H
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