Renesas RL78/G1P Hardware User Manual page 18

CHAPTER 23 FLASH MEMORY .......................................................................................................... 668
23.1 Serial Programming Using Flash Memory Programmer ...................................................... 669
23.1.1 Programming environment ........................................................................................................... 671
23.1.2 Communication mode .................................................................................................................. 671
23.2 Serial Programming Using External Device (that Incorporates UART) .............................. 672
23.2.1 Programming environment ........................................................................................................... 672
23.2.2 Communication mode .................................................................................................................. 673
23.3 Connection of Pins on Board .................................................................................................. 674
23.3.1 P40/TOOL0 pin ............................................................................................................................ 674
23.3.2 RESET pin .................................................................................................................................... 674
23.3.3 Port pins ....................................................................................................................................... 675
23.3.4 REGC pin ..................................................................................................................................... 675
23.3.5 X1 and X2 pins ............................................................................................................................. 675
23.3.6 Power supply ................................................................................................................................ 675
23.4 Data Flash ................................................................................................................................. 676
23.4.1 Data flash overview ...................................................................................................................... 676
23.4.2 Register controlling data flash memory ........................................................................................ 677
23.4.2.1 Data flash control register (DFLCTL) .................................................................................... 677
23.4.3 Procedure for accessing data flash memory ................................................................................ 678
23.5 Programming Method .............................................................................................................. 679
23.5.1 Controlling flash memory .............................................................................................................. 679
23.5.2 Flash memory programming mode ............................................................................................... 680
23.5.3 Selecting communication mode .................................................................................................... 681
23.5.4 Communication commands .......................................................................................................... 682
23.5.5 Description of signature data ........................................................................................................ 684
23.6 Security Settings ...................................................................................................................... 685
23.7 Flash Memory Programming by Self-programming ............................................................. 687
23.7.1 Flash shield window function ........................................................................................................ 689
23.8 Processing Time for Each Command When PG-FP6 Is in Use (Reference Value) ............ 690
CHAPTER 24 ON-CHIP DEBUG FUNCTION ..................................................................................... 691
24.1 Connecting E1, E2, E2 Lite, E20 On-chip Debugging Emulator to RL78/G1P .................... 691
24.2 On-chip Debug Security ID ...................................................................................................... 692
24.3 Securing of User Resources ................................................................................................... 692
CHAPTER 25 BCD CORRECTION CIRCUIT ..................................................................................... 694
25.1 BCD Correction Circuit Function ............................................................................................ 694
25.2 Registers Used by BCD Correction Circuit ........................................................................... 694
25.2.1 BCD correction result register (BCDADJ) ..................................................................................... 694
25.3 BCD Correction Circuit Operation .......................................................................................... 695
Index-12