RL78/G1P
11.5.6 Slave transmission/reception
Slave transmission/reception is that the RL78/G1P transmits/receives data to/from another device in the state of a
transfer clock being input from another device.
3-Wire Serial I/O
Target channel
Pins used
Interrupt
Error detection flag
Transfer data length
Transfer rate
Data phase
Clock phase
Data direction
Notes 1. Because the external serial clock input to the SCK00 pin is sampled internally and used, the fastest transfer
rate is f
/6 [Hz].
MCK
2. Use this operation within a range that satisfies the conditions above and the peripheral functions
characteristics in the electrical specifications (see CHAPTER 27 ELECTRICAL SPECIFICATIONS).
Remarks 1.
f
: Operation clock frequency of target channel
MCK
f
: Serial clock frequency
CLK
2.
m: Unit number (m = 0), n: Channel number (n = 0), mn = 00
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Channel 0 of SAU0
SCK00, SI00, SOm0
INTCSI00
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode)
can be selected.
Overrun error detection flag (OVFmn) only
7 or 8 bits
Notes 1, 2
Max. f
/6 [Hz]
MCK
Selectable by the DAPmn bit of the SCRmn register
DAPmn = 0: Data I/O starts from the start of the operation of the serial clock.
DAPmn = 1: Data I/O starts half a clock before the start of the serial clock operation.
Selectable by the CKPmn bit of the SCRmn register
CKPmn = 0: Non-reverse
CKPmn = 1: Reverse
MSB or LSB first
CHAPTER 11 SERIAL ARRAY UNIT
CSI00
383