Register Controlling Watchdog Timer; Watchdog Timer Enable Register (Wdte) - Renesas RL78/G1P Hardware User Manual

16-bit single-chip microcontroller

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8.3 Register Controlling Watchdog Timer

The watchdog timer is controlled by the watchdog timer enable register (WDTE).

Writing "ACH" to the WDTE register clears the watchdog timer counter and starts counting again.

This register can be set by an 8-bit memory manipulation instruction.

Reset signal generation sets this register to 9AH or 1AH

Address: FFFABH

Note The WDTE register reset value differs depending on the WDTON bit setting value of the option byte

(000C0H). To operate watchdog timer, set the WDTON bit to 1.

0 (watchdog timer count operation disabled)

1 (watchdog timer count operation enabled)

Cautions 1. If a value other than "ACH" is written to the WDTE register, an internal reset signal is

2. If a 1-bit memory manipulation instruction is executed for the WDTE register, an internal reset

signal is generated.

3. The value read from the WDTE register is 9AH/1AH (this differs from the written value (ACH)).

R01UH0895EJ0100 Rev.1.00

Nov 29, 2019

Figure 8-2. Format of Watchdog Timer Enable Register (WDTE)

After reset: 9AH/1AH

WDTON Bit Setting Value

WDTE Register Reset Value

CHAPTER 8 WATCHDOG TIMER