Renesas RL78/G1P Hardware User Manual page 462

RL78/G1P
Figure 11-107. Flowchart of UART Transmission (in Continuous Transmission Mode)
<1>
<2>
<3>
<2>
No
Write MDmn0 bit to 1
Yes
<6>
Remark <1> to <6> in the figure correspond to <1> to <6> in Figure 11-106 Timing Chart of UART
Transmission (in Continuous Transmission Mode).
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Starting UART
communication
SAU default setting
Setting transmit data
Enables interrupt
Writing transmit data to the SDRmn
[7:0] bits (TXDq register) (8 bits) or
the SDRmn [8:0] bits (9 bits)
Wait for transmit completes
Buffer empty/
transfer end interrupt
Number of
communication data > 0?
Yes
Writing transmit data to theSDRmn
[7:0] bits(TXDq register) (8 bits) or
the SDRmn [8:0] bits (9 bits)
Subtract -1 from number of
transmit data
RETI
Transmission completed?
Yes
Communication
continued?
No
Disable interrupt (MASK)
Write STmn bit to 1
End of communication
CHAPTER 11 SERIAL ARRAY UNIT
For the initial setting, refer to Figure 11-101.
(Select buffer empty interrupt)
Set data for transmission and the number of data. Clear communication end flag
(Storage area, Transmission data pointer, Number of communication data and
Communication end flag are optionally set on the internal RAM by the software).
Clear interrupt request flag (XXIF), reset interrupt mask (XXMK)
and set interrupt enable (EI).
Read transmit data from storage area and write it to TXDq.
Update transmit data pointer.
Communication starts by writing to
SDRmn [7:0].
When buffer empty/transfer end interrupt is
generated, it moves to interrupt processing
routine.
If transmit data is left, read them from
storage area then write into TxDq, and
No
update transmit data pointer and number of
transmit data.
If no more transmit data, clear MDmn0 bit if
it's set. If not, finish.
MDmn0 = 1?
Yes
<4>
Clear MDmn0 bit to 0
Check completion of transmission by
verifying transmit end flag
No
<5>
Sets communication
completion interrupt flag
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