Renesas RL78/G1P Hardware User Manual page 533

RL78/G1P
(1) Master device operation
(a) Start ~ Address ~ Data ~ Data ~ Stop (transmission/reception)
(i) When WTIMn = 0
ST AD6 to AD0 R/W ACK
1: IICSn = 1000×110B
2: IICSn = 1000×000B
3: IICSn = 1000×000B (Sets the WTIMn bit to 1)
4: IICSn = 1000××00B (Sets the SPTn bit to 1)
5: IICSn = 00000001B
Note To generate a stop condition, set the WTIMn bit to 1 and change the timing for generating the INTIICAn
interrupt request signal.
Remark : Always generated
: Generated only when SPIEn = 1
×: Don't care
(ii) When WTIMn = 1
ST AD6 to AD0 R/W ACK
1: IICSn = 1000×110B
2: IICSn = 1000×100B
3: IICSn = 1000××00B (Sets the SPTn bit to 1)
4: IICSn = 00000001B
Remark : Always generated
: Generated only when SPIEn = 1
×: Don't care
Remark n = 0, 1
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
D7 to D0 ACK
1 2
Note
D7 to D0 ACK
1 2
CHAPTER 12 SERIAL INTERFACE IICA
SPTn = 1
D7 to D0 ACK SP
3 4
SPTn = 1
D7 to D0 ACK SP
3
5
4
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