Renesas RL78/G1P Hardware User Manual page 17

19.4.3 When used as interrupt and reset mode ...................................................................................... 635
19.5 Cautions for Voltage Detector ................................................................................................. 641
CHAPTER 20 SAFETY FUNCTIONS ................................................................................................... 643
20.1 Overview of Safety Functions ................................................................................................. 643
20.2 Registers Used by Safety Functions ...................................................................................... 644
20.3 Operation of Flash memory CRC operation function (high-speed CRC) ........................... 644
20.3.1 Flash memory CRC control register (CRC0CTL) ......................................................................... 645
20.3.2 Flash memory CRC operation result register (PGCRCL) ............................................................. 645
20.3.3 Operation flow .............................................................................................................................. 646
20.4 CRC operation function (general-purpose CRC) .................................................................. 647
20.4.1 CRC input register (CRCIN) ......................................................................................................... 647
20.4.2 CRC data register (CRCD) ........................................................................................................... 648
20.4.3 Operation flow .............................................................................................................................. 648
20.5 RAM parity error detection function ....................................................................................... 649
20.5.1 RAM parity error control register (RPECTL) ................................................................................. 649
20.6 RAM guard function ................................................................................................................. 651
20.6.1 Invalid memory access detection control register (IAWCTL) ........................................................ 651
20.7 SFR guard function .................................................................................................................. 652
20.7.1 Invalid memory access detection control register (IAWCTL) ........................................................ 652
20.8 Invalid memory access detection function ............................................................................ 653
20.8.1 Invalid memory access detection control register (IAWCTL) ........................................................ 654
20.9 Frequency detection function ................................................................................................. 655
20.9.1 Timer input select register 0 (TIS0) .............................................................................................. 656
20.10 A/D test function ..................................................................................................................... 657
20.10.1 A/D test register (ADTES) .......................................................................................................... 659
20.10.2 Analog input channel specification register (ADS) ...................................................................... 660
CHAPTER 21 REGULATOR ................................................................................................................. 661
21.1 Regulator Overview .................................................................................................................. 661
CHAPTER 22 OPTION BYTE ............................................................................................................... 662
22.1 Functions of Option Bytes ...................................................................................................... 662
22.1.1 User option byte (000C0H to 000C2H) ......................................................................................... 662
22.1.2 On-chip debug option byte (000C3H) ........................................................................................... 662
22.2 Format of User Option Byte .................................................................................................... 663
22.3 Format of On-chip Debug Option Byte ................................................................................... 666
22.4 Setting of Option Byte.............................................................................................................. 667
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